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Berkeley
Design
Automation Analog
FastSPICE (AFS)
and RF
FastSPICE (RFS) tools provide
design teams
the means to perform verification on complex blocks and full circuits
that is
otherwise impractical or impossible. The tools’ nanometer SPICE
accuracy
combined
with 5x-10x performance and 5x-10x effective capacity is transforming
how
analog/RF design teams verify their circuits, which in turn will enable
them to
create even more impressive circuits in the near future.
Analog/RF
Comparative
Simulation Scorecard

The
table above summarizes
the comparative results for traditional SPICE, digital fastSPICE, and
Berkeley
Design Automation AFS and RFS. In so doing it makes the
company’s
technical
advantages strikingly clear. The rows are the specific verification
tasks for
simple blocks, complex blocks, and full circuits. The same verification
tasks
apply to simple and complex blocks. The table provides a summary rating
for
each verification task by simulator type. The ratings are from 0 to 4
check
marks.
Traditional
SPICE
generally performs all verification tasks well for simple blocks. Its
limited
performance and limited effective capacity severely limit its
applicability for
complex blocks and full circuits. For complex blocks it is adequate for
some
pre-layout simulation and minimally performs most other tasks. However
it
cannot generate full-circuit DC operating points or run full-circuit
performance simulations for moderately complex top-level designs.
For
all of the
attention given to digital fastSPICE simulators in the analog/RF
domain, they
provide value only for tasks that do not need accuracy. They are not at
all
applicable for simple blocks because traditional SPICE is much easier
to use,
guaranteed accurate, fast enough (in fact faster for small blocks), and
has
sufficient capacity. Digital fastSPICE simulators are only really
applicable to
functional verification at the complex-block and full-circuit level.
They rate
only two checks in each case because they require block-level simulator
tuning
and their accuracy limitations are unacceptable in many cases.
While
Berkeley Design
Automation focuses on Big Analog/RF Verification, its tools provide
superior
performance often with higher accuracy even on circuits with <1K
total
elements and <1-hour runtimes. Nevertheless, their real value is
on
complex
blocks and full circuits, which are where design teams face their
biggest
challenges given today’s highly analog/RF integrated
circuits. In the
former
case, they provide substantially more value across the board. Yet there
is room
for improvement with additional accuracy, performance, and/or
functionality for
post-layout, variation, noise, and periodic analysis. The
company’s Precision
Circuit Analysis
technology
shines on full circuits being the only solution for DC operating point
analysis
and targeted performance simulations as well as providing vastly
superior
analysis of package and transmission-line effects. Again there is room
for
improvement. Besides the obvious improvements in performance and
capacity,
additional features such as co-simulation, hierarchy, parasitic
reduction, and
multi-core support would significantly improve its current advantages.
For
more information about how Precision
Circuit Analysis tools
compare
with
traditional SPICE and digital fastSPICE, see:
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