Traditional SPICE

Traditional SPICE tools use the following techniques to ensure true SPICE accuracy

• Create a flat netlist
• Find and maintain a true DC operating point
• Utilize global tolerance settings only (most notably reltol)
• Utilize the original device equations (make no device approximations)
• Solve the full original matrix at each iteration of each time-step

The IC community universally grants the two market leading SPICE simulators “golden” accuracy status. These simulators’ waveforms are the reference for all Berkeley Design Automation accuracy comparisons.

Traditional SPICE tools work well for simple blocks, e.g., those with <10K elements and <1 hour transient runtimes. However their performance and capacity are inadequate for thoroughly characterizing complex blocks and they fail to converge for many top-level analog/RF circuits.

Digital FastSPICE

Digital fastSPICE tools are circuit simulators that sacrifice some accuracy in order to provide increased performance and/or capacity relative to traditional SPICE. Some of the techniques they use that sacrifice accuracy are:

• Do not generate or maintain a DC operating point
• Utilize simplified device models
• Partition into sub-circuits and independently solving the matrix for each
• Use event-driven simulation
• Require block-level simulator tuning
• Utilize hierarchy to represent “redundant” circuitry

Despite marketing claims to the contrary, it is simply not possible to use any of the above techniques without compromising some degree of accuracy (which is why traditional SPICE simulators do not use these techniques even though they have been available for over a decade).

The name “digital fastSPICE” is intended to make it clear that these simulators are well suited for digital designs (e.g., memories and SoCs) that require potentially orders of magnitude more performance and/or capacity than traditional SPICE and for which up to 10% (or potentially more) inaccuracy is sufficient. Digital fastSPICE simulators are a fundamental mismatch for analog and RF circuits, because virtually any inaccuracy in the simulation of analog/RF circuits can lead to a qualitatively (i.e., functionally) different result; this is totally unacceptable when designers require results that are quantitatively accurate to the millivolt or milliamp range (~0.1%).

Many analog/RF design teams use or have used digital fastSPICE for functional verification (i.e., to check qualitative behavior) on analog/RF circuits. Doing so requires sometimes extensive block-based simulator tuning. The tuning methodology requires designers to select an initial set of simulator accuracy parameters for each block, run a simulation, check the results, adjust the simulation parameters (tightening blocks that seem to have incorrect or insufficient behavior and loosening blocks where accuracy seems “good enough” but performance is low), and repeat until the overall behavior looks “good enough” and the simulation is fast enough (or the designer gives up). Beyond the obvious problems of lost designer productivity, lost time, and considerable resource underutilization (tool and hardware), the core problem is that there is no reference for determining whether any results really are “good enough.” Many analog/RF designer teams will not even try digital fastSPICE for these reasons. As one design manager put it, “digital fastSPICE simulators are the fastest way to get the wrong answer.”

Multi-mode Traditional SPICE/Digital FastSPICE Tools

Several EDA companies now offer multi-mode simulators that include traditional SPICE and digital fastSPICE modes. The marketing messages make it seem like these simulators produce true SPICE accurate results with much higher performance and capacity than traditional SPICE. The fact is that these simulators are in fact separate traditional SPICE and digital fastSPICE engines, and users can have the results associated with one or the other type of simulator – not the best of both worlds. If these simulators could simultaneously deliver the best of both worlds, they would not need multiple operating modes.

Analog FastSPICE

Berkeley Design Automation Analog FastSPICE is the only known simulator to produce true SPICE accuracy with 5x-10x higher performance and 5x-10x higher effective capacity. Berkeley Design Automation uses the label “true SPICE accuracy” to mean identical waveforms to traditional SPICE down to the SPICE noise floor. The AFS 5x-10x performance and effective capacity advantages are compared to any simulator that also produces true SPICE accuracy. BDA also offers a periodic analysis tool, RF FastSPICE™ (RFS) with similar accuracy, performance, and capacity characteristics.

The company has established the foundation for its accuracy, performance, and capacity claims based on benchmarks with literally hundreds of production circuits. These claims are not hype, and there is no magic behind them – only solid, innovative engineering. Berkeley Design Automation uses the traditional SPICE techniques stated above to ensure it always delivers true SPICE accuracy (i.e., it creates a flat netlist, finds and maintains a true DC operating point, utilizes global tolerance settings only, utilizes the original device equations without approximations, and solve the original matrix at every time step). Contrary to other simulator providers, rather than compromise accuracy Berkeley Design Automation is pushing accuracy to a new level and often provides provably better accuracy than traditional SPICE. This increased accuracy is needed to accurately deliver analysis beyond transient simulation, e.g. noise analysis and periodic analysis.

The technology’s exceptional performance and capacity are not the result of a single “silver bullet,” but of many “silver bullets.” The company started with a new clean, modular simulator architecture that enables it to independently optimize every major area within the simulator. Berkeley Design Automation systematically applies the latest numerical analysis techniques to optimize each area without compromising accuracy. Enough silver bullets hit every target circuit (>1K elements and >1 hour runtime) to deliver at least 5x performance; however, many more silver bullets hit some circuits resulting in 10x, 20x, or sometimes even greater performance benefit.  Even with its significant lead, Berkeley Design Automation sees considerable room for additional performance advances.

For more information about how Precision Circuit Analysis tools compare with traditional SPICE and digital fastSPICE, see:

• Evaluating Circuit Simulators
• Comparative Summary Scorecard