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Overview
Analog FastSPICE uses Berkeley Design Automation’s proprietary Precision Circuit Analysis™ technology to deliver true SPICE accuracy, 5X to 10X performance, 5x-10x higher capacity than any other tool. It is ideal for any transient simulation that requires true SPICE accuracy and would take multiple hours or longer in a traditional SPICE simulator – including post-layout designs with up to 1 million or more elements.

Analog FastSPICE has been proven on a wide range of production circuits including full 802.11 a/b/g transceivers, sigma-delta ADCs, automatic gain control circuits with bandgap and bias, high-speed I/Os, memories and memory interfaces, and multi-GHz PLLs and DLLs.

Key Features

  • True SPICE accuracy
  • 5x-10x faster than any other tool
  • 5x-10x higher capacity than any other tool
  • Robust DC analysis with unmatched convergence
  • Co-simulation with leading Verilog® simulators
  • DC (.op and sweep), AC, and transient analysis
  • Network analysis, pole-zero, transfer function, 
  • Monte Carlo, alter, and sweepAC analysis
  • Supports standard netlist, model, and output formats
  • Integrated into the Cadence Analog Design Environment

Target Applications

  • Complex-Block Characterization 
    • PLLs, DLLs, ADCs, SerDes, Tx chains, Rx chains, memory interfaces, etc.
  • Full-Circuit Performance Simulation
    • Wireless transceivers, wireline transceivers, high-speed I/O macros, memories, microcontrollers, data converters, and power convertersRF transceivers (802.11, WiFi, UWB, GSM,…)

Technology
Analog FastSPICE is based on Precision Circuit Analysis technology. This technology is a proprietary combination of innovative applied mathematics and optimized numerical analysis. Among the core components are a fast sparse matrix solver, globally convergent nonlinear solvers, and efficient stiff differential algebraic equation solver. Unlike digital fastSPICE simulators, Analog FastSPICE makes no simplifying assumptions or approximations. It solves the original device equations on the original circuit with accuracy that is equivalent to, and may even exceed, traditional SPICE simulators. This means that it needs no block-level tuning and always provides true accuracy at every node in the circuit; hence every simulation is a full performance simulation. The result is breakthrough technology that can address a whole new class of verification problems.

Fast, Robust DC Analysis
Analog FastSPICE includes an innovative, globally convergent solvers that provide unprecedented dc analysis speed and reliability.

Co-Simulation with Leading Verilog Simulators
Analog FastSPICE Co-Simulation provides design teams an unprecedented combination of true SPICE accuracy, 5x-10x higher performance, and 5x-10x higher capacity – all using an industry standard flow. Analog FastSPICE Co-Simulation uses a standard Cadence® Analog Design Environment based flow, supports standard “Spectre®-Verilog” use model, includes mixed-analog/digital debugging, and integrates with industry leading Verilog simulators including Cadence NC-Verilog®, Cadence Verilog-XL, and Mentor® ModelSim®. 

Fits Your Existing Flow
Analog FastSPICE easily fits into existing HSPICE® and Spectre-based verification flows. It reads standard HSPICE and Spectre-format netlists and supports popular device model formats, including BSIM3, BSIM4, Gummel-Poon, MOS11, and Mextram.

Analog FastSPICE runs in both batch mode and interactive mode using the Cadence Virtuoso Analog Design Environment. Results can be viewed with BDA’s waveform viewer, WaveCrave, or third party waveform viewers such as those from Cadence and Synopsys®.

Feature Summary

  • Analyses: dc, ac, noise, transient, Verilog Co-Simulation
  • Netlist compatibility
    • HSPICE
    • Spectre
    • VCD for simulation stimulus
  • Model support
    • BSIM3, BSIM4, BSIMSOI, MOS1
    • Gummel-Poon, Mextram
    • HICUM, VBIC, Juncap
    • Verilog-A, s-parameter, w-element
  • Outputs
    • PSF ASCII, PSF binary, tr0
    • Nutmeg ASCII, Nutbin, Nutbinf
  • Integration
    • Comprehensive Cadence Analog Design Environment (ADE) integration
  • Waveform viewer
    • WaveCrave™ waveform processor

Platform Support
Analog FastSPICE is available for SUN and Linux operating systems.

 


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© 2008 Berkeley Design Automation
Analog FastSPICE, Noise Analysis Option, RF FastSPICE, PLL Noise Analyzer, WaveCrave, and Precision Circuit Analysis are trademarks and Berkeley Design is a registered trademark of Berkeley Design Automation, Inc. Synopsys and HSPICE are registered trademarks of Synopsys Inc. (NASDAQ:SNPS). Cadence, Spectre, NC-Verilog, and Verilog are registered trademarks of Cadence Design Systems Inc. (NASDAQ:CDNS). Mentor and ModelSim are registered trademarks of Mentor Graphics Corporation (NASDAQ: MENT). Any other trademarks or trade names mentioned are the property of their respective owners.