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Berkeley Design Automation Enters
Analog/RF Mixed-Signal Verification
Delivers
Award-Winning Analog FastSPICE Co-Simulation with Leading Verilog
Simulators
Santa Clara, CA, — June 5, 2008— Berkeley Design
Automation, Inc., provider of Precision Circuit Analysis™
technology for advanced analog and RF integrated circuits (ICs), today
announced the availability of true SPICE accurate analog/RF
mixed-signal verification based on co-simulation of its award-winning
Analog FastSPICE™ circuit simulator with leading
Verilog® HDL
simulators. Numerous design teams around the world have verified that
Analog FastSPICE Co-Simulation delivers identical results 5x-10x faster
than any other true SPICE accurate solution.
Analog and RF design teams face increasingly difficult mixed-signal
verification challenges. Complex blocks such as fractional-N PLLs,
frequency synthesizers, and transmit and receive chains increasingly
include complex digital logic. Nanometer CMOS ICs such as
system-on-chips (SoCs), wireless transceivers, power ICs, and data
converters have a rich mix of digital logic and high-performance
analog/RF circuitry. Design teams want to verify their analog/RF
circuitry with true SPICE accuracy together with their digital logic
using their standard Verilog simulator. Doing so has become impractical
or impossible with traditional SPICE due to their limited performance
and capacity. Instead design teams have had to use analog/mixed-signal
behavioral or digital fastSPICE simulators that sacrifice critical
accuracy, thereby putting their whole project at risk. Analog FastSPICE
Co-Simulation provides design teams an unprecedented combination of
true SPICE accuracy, 5x-10x higher performance, and 5x-10x higher
capacity – all using an industry standard flow.
"Verifying analog/RF mixed-signal complex blocks and full circuits is
critical to delivering high-quality silicon on time," said Tirdad
Sowlati, senior director of RFIC design engineering at Skyworks
Solutions, Inc. "We have been using Analog FastSPICE Co-Simulation to
verify our power control loop and our full-chip transceiver. It is easy
to use and delivers true SPICE accurate results 5x-10x faster with far
higher capacity than traditional SPICE-based mixed-signal
solutions."
Analog FastSPICE Co-Simulation uses a standard Cadence® Analog
Design Environment based flow, includes mixed-analog/digital debugging,
and integrates with industry leading Verilog simulators including
Cadence NC-Verilog®, Cadence Verilog-XL, and Mentor
Graphics®
ModelSim®. The Analog FastSPICE circuit simulator uses standard
Cadence Spectre® and Synopsys® HSPICE® netlists
and models
and delivers identical results to traditional
“golden”
SPICE simulators 5x-10x faster and with 5x-10x higher capacity. The
results are foundry certified down to 45nm. The capability is available
immediately.
Berkeley Design Automation tools include Analog FastSPICE™
circuit simulation, Noise Analysis Option™ device noise
analyzer,
RF FastSPICE™ periodic analyzer, and PLL Noise
Analyzer™
stochastic nonlinear engine. The company guarantees identical waveforms
to the leading "golden" SPICE simulators down to noise floor (typically
0.1% or less) while delivering 5x-10x higher performance and 5x-10x
higher capacity. It achieves this by using advanced algorithms and
numerical analysis techniques to rapidly solve the full-circuit matrix
and the original device equations without any shortcuts that could
compromise accuracy.
Design teams from top-10 semiconductor companies to leading startups
use Berkeley Design Automation tools to solve big analog/RF
verification problems. Typical applications include characterizing
complex blocks (e.g., PLLs, ADCs, DC:DC converters, PHYs, Tx/Rx chains)
and running performance simulation of full circuits (e.g., wireless
transceivers, wireline transceivers, high-speed I/O macros, memories,
microcontrollers, data converters, and power converters).
"Most of our nearly 50 leading-edge customers have faced tremendous
challenges in analog/RF mixed-signal verification," said Ravi
Subramanian, president and CEO of Berkeley Design Automation. "With
Analog FastSPICE Co-Simulation, we are proud to deliver another
industry first that is already proven on some of the
industry’s
most complex production circuits. This capability will help our
customers continue delivering superior products to market significantly
faster."
About
Berkeley
Design Automation
Berkeley Design Automation,
Inc. is the recognized leader in advanced analog/RF verification. Its
Precision Circuit Analysis technology combines the accuracy,
performance, and capacity needed to verify GHz designs in
nanometer-scale silicon. Berkeley Design Automation has received
numerous awards including EDN Magazine’s 2006 Innovation of
the
Year, the 2006 Red Herring 100 North America, and the 2007 Red Herring
Global 100 Finalist. Founded in 2003, the company is funded by Woodside
Fund, Bessemer Venture Partners, Matsushita Electric Industrial Co.
Ltd., and NTT Corporation. For more information, see
http://www.berkeley-da.com.
Analog FastSPICE, Noise Analysis Option, RF FastSPICE, PLL Noise
Analyzer, WaveCrave, and Precision Circuit Analysis are trademarks and
Berkeley Design is a registered trademark of Berkeley Design
Automation, Inc. Synopsys and HSPICE are registered trademarks of
Synopsys Inc. (NASDAQ:SNPS). Cadence, Spectre, NC-Verilog, and Verilog
are registered trademarks of Cadence Design Systems Inc. (NASDAQ:CDNS).
Mentor and ModelSim are registered trademarks of Mentor Graphics
Corporation (NASDAQ: MENT). Any other trademarks or trade names
mentioned are the property of their respective owners.
PR for Berkeley
Design
Automation – Cayenne Communication LLC
Michelle
Clancy, 252-940-0981, michelle.clancy@cayennecom.com
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