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Berkeley
Design Automation Names Industry Veteran Paul Estrada COO
Company Poised to Take Leadership Position
in Analog/RF Verification
SANTA CLARA, Calif. —July 7, 2006—Berkeley Design Automation Inc.,
provider of Precision Circuit Analysis(™) technology for advanced
analog and RF integrated circuits, today announced the appointment of
Paul Estrada as chief operating officer (COO). An EDA veteran with an
outstanding track record of driving innovation and growth, Estrada will
work closely with the company’s CEO, Ravi Subramanian, to bring the
company’s breakthrough technology to the general market.
Design teams waste precious time, silicon area, power, and test chips
trying to meet GHz specifications in nanometer-scale technologies.
Berkeley Design Automation’s new Precision Circuit Analysis technology
enables design teams to rapidly verify problems that otherwise would be
impractical or infeasible prior to silicon. The company entered the
market last year with PLL Noise Analyzer(™), a tool which focused on a
narrow, but notoriously difficult problem. Having proven the silicon
accuracy, performance, and robustness of its technology on over 75
production designs, the company is readying itself to enter the general
market to tackle a wide range of the most difficult analog/RF
verification problems.
Ravi Subramanian, Berkeley Design Automation CEO said, “Paul brings a
unique combination of strategy and execution to BDA. His track record
for focusing technology, growing new markets, and reinvigorating
stagnating markets is unmatched in the industry. Paul is the perfect
addition to our executive team, and we’re thrilled to have him on
board.”
Prior to BDA, Estrada spent nearly 6 years at Cadence Design Systems
(NASDAQ:CDNS) where he was general manager for Encounter Test,
corporate vice president of strategy, and launched the Virtuoso custom
design platform, Encounter digital design platform, and Incisive
functional verification platform. In 1996, he co-founded 0-In Design
Automation and helped pioneer assertion-based verification as their VP
verification engineering. From 1992-1996 Estrada was responsible for
synthesis marketing at Synopsys during that business’ explosive growth
period. He also has experience in the semiconductor, wireless
communication, and industrial automation industries. Estrada holds
engineering degrees with top honors from Stanford University and the
University of Illinois. He also holds three patents.
“Berkeley Design Automation is at the cusp of something big,” said
Estrada. “In my nearly 15 years in EDA, I have never seen such strong
technology. Numerous companies have challenged us with designs way
beyond on the capabilities of today’s SPICE and RF simulators, and our
results have been outstanding.”
About
Berkeley Design Automation
Berkeley Design Automation Inc. is a recognized leader in advanced
analog/RF verification. Its Precision Circuit Analysis technology
combines the accuracy, performance, and robustness needed to verify GHz
designs in nanometer-scale silicon. Berkeley Design Automation is the
recipient of the 2006 Red Herring 100 North America Award, making it
the first EDA company to earn such a distinction in 5 years. Founded in
2003, the company is funded by Woodside Fund, Bessemer Venture
Partners, and Matsushita Electric Industrial Co., Ltd. For more
information, see http://www.berkeley-da.com.
PLL Noise Analyzer,
Stochastic Nonlinear Engine, and Precision Circuit Analysis are
trademarks of Berkeley Design Automation, Inc. Berkeley Design is a
registered trademark of Berkeley Design Automation, Inc.
HSPICE is a registered trademark of Synopsys Inc. (NASDAQ:SNPS).
Spectre is a registered trademark of Cadence Design Systems Inc.
(NASDAQ:CDNS).
Berkeley Design Automation
Tom Ferry, 408-496-6600, x225, thomas.ferry@berkeley-da.com
PR for Berkeley Design Automation – Cayenne Communication LLC
Michelle Clancy, 252-940-0981, michelle.clancy@cayennecom.com
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