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Berkeley Design Automation Announces the Industry's First PLL Noise Analysis Tool for High-Performance Analog/RF ICs

Customer-validated stochastic nonlinear technology delivers fast and accurate noise prediction that reduces silicon respins

SANTA CLARA, Calif. —May 23, 2005 — Berkeley Design Automation Inc., a new analog/RF electronic design automation company, today announced its initial product, PLL Noise Analyzer(™), the industry’s first noise analysis tool for high-performance analog/RF integrated circuits containing phase-locked loops (PLLs). PLL Noise Analyzer is proven to dramatically reduce the need for silicon respins due to noise, enabling circuit designers to reliably meet cost, performance, and schedule goals. PLL Noise Analyzer has been adopted by leading semiconductor and analog IP companies.

“Lack of accurate noise prediction is one of the leading causes of respins and product delays for analog/RF integrated circuits,” said Ravi Subramanian, president and CEO of Berkeley Design Automation. “PLL Noise Analyzer is the only tool today that provides accurate noise analysis and has been proven to reduce respins. We are pleased it has been adopted by leading semiconductor companies and analog IP providers in their verification flow, enabling them to confidently make performance, power, area, noise trade-offs.”

PLL Noise Analyzer is a complete solution for noise and jitter analysis in analog integrated circuits and provides:

• Fast and accurate phase noise and jitter analysis of full PLLs
• Quick identification of top circuit noise contributors
• Thorough analysis of circuit noise sensitivity
• Easy integration with existing analog verification flows

These benefits have been demonstrated on more than 35 customer designs in silicon technologies from 0.25µ to below 90nm from the world’s leading integrated device manufacturers and foundries, including Taiwan Semiconductor Manufacturing Corporation (TSMC), the world's largest dedicated semiconductor foundry.

The new product is based on the company’s proprietary Stochastic Nonlinear Engine(™), which allows fast and accurate analysis of the nonlinear, time-varying behavior of full PLL circuits at the transistor-level. PLL Noise Analyzer provides complete phase noise and jitter analysis for noise caused by all sources – random and deterministic sources that are inherent or external to the analog circuits.

“We design a wide variety of high-performance I/Os at speeds up to and beyond 10Gbits per second,” said Kunio Mori, general manager of the Server Systems Division at NEC Corporation. “Meeting phase noise and jitter targets is a significant design challenge. PLL Noise Analyzer is an innovative tool that enables us to accurately analyze the noise of a full, transistor-level PLL before tape-out. We have used PLL Noise Analyzer on our 90nm SERDES and found the tool to be fast, accurate and easy to use.”

Until now, designers were forced to use manually created models, linear approximations, and multiple silicon revisions to deliver working designs. PLL Noise Analyzer eliminates the need for this time-consuming methodology and enables designers to confidently optimize performance, area, and power consumption while meeting noise specifications.

“We were an early adopter of Berkeley Design's technology,” said Bill Walker, vice president of Advanced LSI Technology Research at Fujitsu Laboratories. “We use PLL Noise Analyzer to analyze jitter in clock and data recovery (CDR) circuits. The tool produces accurate results and is much faster and more reliable than our previous noise analysis methodology. Our engineers, who are fluent in HSPICE, were able to master PLL Noise Analyzer in a matter of minutes.”

“Analog Bits is the market leader and world's largest supplier of sophisticated clocking macro IP,” said Alan Rogers, president of Analog Bits. “We are pleased to use BDA's PLL Noise Analyzer, providing high speed and accuracy for PLL noise analysis, and enabling a high-quality design methodology.”

The Stochastic Nonlinear Engine in PLL Noise Analyzer is the only technology that provides designers detailed insight into the sources of noise in a circuit and identifies the circuit’s sensitivity to the noise caused by each device in the design.

“Today’s microprocessor-based silicon solutions require leading-edge analog circuits for the core and I/O,” said Vincent von Kaenel, director of analog design at P.A. Semi, a fabless microprocessor startup developing world-class, high performance, low-power, SOC solutions for the embedded and computing markets. “Meeting stringent PLL noise and jitter specifications is critical to the success of these designs. PLL Noise Analyzer is the only tool that can accurately analyze the noise of a full PLL. With this tool, we can confidently make performance, noise, area, and power trade-offs during design.”

PLL Noise Analyzer fits easily into existing analog/RF verification flows. PLL Noise Analyzer reads HSPICE and Spectre format netlists and standard device models.

PLL Noise Analyzer is available in production immediately for Sun and Linux operating systems.

About Berkeley Design Automation
Berkeley Design Automation Inc. was founded in 2003 to address the verification needs of high-performance analog/RF integrated circuits (ICs). Berkeley Design Automation is a venture-backed, private company funded by Woodside Fund and Bessemer Venture Partners. The company’s technology characterizes the nonlinear, time-varying behavior of complex analog and RF circuits, providing extremely accurate predictions that dramatically reduce the need for silicon respins. The company’s first product, PLL Noise Analyzer™, the industry's first noise analysis tool for phase-locked loops (PLLs), has already been adopted by semiconductor industry leaders. For more information, see www.berkeley-da.com.

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Editorial Contact:
PR for Berkeley Design Automation – Cayenne Communication LLC
Michelle Clancy, 252-940-0981, michelle.clancy@cayennecom.com

PLL Noise Analyzer and Stochastic Nonlinear Engine are trademarks of Berkeley Design Automation Inc. HSPICE is a trademark of Synopsys Inc. Spectre is a trademark of Cadence Design Systems Inc.