Company Overview
Berkeley Design Automation, Inc. (BDA) is the recognized leader in advanced analog, mixed-signal, and RF (AMS/RF) verification. The BDA Analog FastSPICE unified circuit verification platform (AFS Platform) combines the accuracy, performance, and capacity needed to verify GHz designs in nanometer-scale silicon. Design teams from top-10 semiconductor companies to leading startups use the AFS Platform to efficiently verify AMS/RF circuits. Founded in 2003, the company has received several industry awards in recognition of its technology leadership and impact on the electronics industry.

Position Description
The person will be an expert in  parallel implementation of scientific and engineering software. He/she will be responsible for performance optimization including  profiling and instrumentation of the code and will address performance improvement on both distributed and shared memory systems. The right candidate would  be familiar with numerical algorithms associated with circuit simulators including sparse matrix solvers.

Responsibilities
•    Profile and identify bottlenecks in performance for various classes of circuits.
•    Architect code to exploit multi-core systems.
•    Enhance the performance of various matrix operations in single and multi-core.
•    Implement methods for partitioning large circuits.

Requirements
•    Previous experience of at least 2 years in multi-core programming.
•    Excellent knowledge of SW parallelizing methods including OpenMP and  pThreads.
•    Strong background in numerical methods and sparse matrix techniques.
•    Outstanding programming skills in C/C++.
•    Graduate degree (Ph. D. preferred) in Electrical Engineering or relevant area.

Desirable
•    Knowledge of multi-threading architecture on different multi-core processors and OS