RF transceivers and their sub-circuits require full SPICE accuracy to precisely characterize their performance. Periodic analysis of complex RF transceiver blocks such as VCOs using traditional RF analysis tools often requires simplifying the netlist (for example, removing buffer and bias circuitry), compromising the verification completeness. Functional simulation of top-level RF transceivers implemented on nanometer-scale CMOS processes and including >100,000 transistors is difficult and performance characterization is completely impractical using traditional SPICE simulators. Performance limitations of traditional SPICE tools also require difficult decisions about what operating modes, configurations, and operating corners to leave unverified at tapeout.

Along with producing identical results to traditional SPICE simulators, Analog FastSPICE reduces overnight simulations to a few hours, weekend simulations to overnight, and week-long simulations to a day. This unprecedented combination of verification accuracy and performance makes it possible to do full top-level performance characterization prior to silicon for the first time. With 5X to 10X more total verification bandwidth, design teams can use Analog FastSPICE for run time-intensive post-layout circuits and up to an order-of-magnitude more operating modes, configurations, and corners in the same amount of time. For tough blocks such as VCOs and crystal oscillators (XOs), RF FastSPICE can converge when RF simulators cannot and it delivers unprecedented performance.

The table below lists production RF transceiver circuits for which Analog FastSPICE and RF FastSPICE delivered full SPICE accuracy at least 5X faster.