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Berkeley Design Automation’s Precision
Circuit Analysis™ technology enables big analog/RF verification
that
would be otherwise impractical or impossible.
- Traditional SPICE tools are too slow for
complex blocks and cannot even converge on full circuits
- Digital fastSPICE tools are too
inaccurate for performance simulation, let alone post-layout
simulation, corner analysis, noise analysis, etc.
Only Berkeley Design Automation tools combine golden SPICE accuracy
with 5x-10x performance and 5x-10x capacity to deliver thorough
complex-block characterization and full-circuit performance simulation.
Click here
to download the Big
Analog/RF Verification white paper.
Complex-Block
Characterization
Complex-Block Characterization includes computationally intensive
verification tasks from pre- and post-layout simulation to variation,
noise, and RF analysis on circuits such as PLLs, DLLs, ADCs, SerDes, Tx
chains, Rx chains, and memory interfaces. Here are a few examples:
Pre-Layout
Simulation (details...)
Post-Layout
Simulation (details...)
Variation
Analysis
(details...)
Noise Analysis (details...)
RF Periodic
Analysis (details...)
Full-Circuit
Performance Simulation
Full-Circuit Performance Simulation targets top-level analog/RF
circuits reaching >2M total elements including >1M transistors.
Verification tasks include DC operating point analysis, functional
verification, package and transmission-line analysis, and targeted
performance simulations. Here are a few examples:
DC
Operating Point Analysis (details...)
Functional
Verification (details...)
Package and
Transmission-line Analysis (details...)
Targeted
Performance Simulation (details...)
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